(1) Field of the Invention
This invention relates to a high selectivity etching method for use in forming contact holes in self-aligned contact structures. More particularly the invention relates to selecting dielectrics, etching methods, and etchants to achieve high selectivity etching.
(2) Description of the Related Art
U.S. Pat. No. 4,954,867 to Hosaka describes the use of a layer of silicon oxy-nitride to protect the gate electrode and wirings from oxidation during high temperature processing steps. The invention does not describe the use of highly selective etching methods.
U.S. Pat. No. 5,286,667 to Lin et al. describes the use of silicon nitride or silicon oxy-nitride barrier layers in the fabrication of metal oxide semiconductor field effect transistors. The barrier layer aids endpoint detection for a plasma etch. The invention does not describe the use of highly selective etching methods.
U.S. Pat. No. 5,364,804 to Ho et al. describes a method of forming a self-aligned contact. The method uses tow silicon nitride layers but does not the use of highly selective etching methods.
U.S. Pat. No. 4,455,737 to Godejahn, Jr. describes a method of forming self-aligned gates and contacts for FET devices wherein mask alignment tolerances are increased and rendered non-critical.